1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device, and more particularly to a method of forming an opening for a conductive layer or a bonding pad in an interlayer insulating film or a passivation layer which has a lamination structure composed of an inorganic insulating layer as a moisture proofing layer and a polyimide layer as a buffer material layer.
2. Description of the Related Art
A first conventional example of a method of forming an opening for a bonding pad in a lamination structure of a polyimide layer and an inorganic insulating layer will be described with reference to FIGS. 1A to 1F. The lamination structure is used as a passivation layer. The method is disclosed in Japanese Laid Open Patent Disclosure (JP-A-Heisei 4-179124: reference 1).
First, referring to FIG. 1A, a bonding pad 102 is formed on a semiconductor substrate 101. Next, referring to FIG. 1B, a silicon nitride layer 103 as the inorganic insulating layer is formed by a plasma CVD method to cover the bonding pad 102 and the substrate 101. Next, referring to FIG. 1C, a photo-sensitive polyimide layer 104 is spin-coated on the silicon nitride layer 103. Subsequently, the substrate 101 is pre-baked in a nitrogen atmosphere to harden the photo-sensitive polyimide layer 104.
Next, referring to FIG. 1D, exposure is performed of the photo-sensitive polyimide layer 104 using a negative-type photo-mask 105. Subsequently, referring to FIG. 1E, development is performed using a dedicated developing solution. As a result, a part of the photo-sensitive polyimide layer 104 which has not been exposed in the process shown in FIG. 1D is developed and removed. In this manner, an opening 106 is formed in the photo-sensitive polyimide layer 104. Finally, referring to FIG. 1F, the silicon nitride layer 3 is dry-etched in a fluoric system atmosphere using the photo-sensitive polyimide layer 104 as an etching mask. Then, heat treatment is performed of the polyimide layer 104 in a nitrogen atmosphere. As a result, an opening 107 to the bonding pad 102 is formed in the passivation layer (103 and 104).
In this manner, in the first conventional example shown in FIGS. 1A to IF, the opening 107 to the bonding pad 102 through the passivation layer (103 and 104) is formed with a single photo-lithography process.
However, in the first conventional method shown in FIGS. 1A to IF, the buffer coat performance of the photosensitive polyimide layer 104 is inferior. For this reason, there is a problem in that decrease of reliability is caused. Also, there is another problem in that the manufacturing cost is increased because the photo-sensitive polyimide is higher in price than un-photosensitive polyimide.
Next, a second conventional example of a method of forming an opening to a bonding pad in a semiconductor device which uses a lamination structure composed of a polyimide layer and an inorganic insulating layer will be described with reference to FIGS. 2A to 2I. This second conventional method is disclosed in Japanese Laid Open Patent Disclosure (JP-A-Heisei 5-190532: reference 2). The lamination structure is used as a passivation layer.
First, referring to FIG. 2A, like the process shown in FIG. 1A, a bonding pad 202 is formed on a semiconductor substrate 201. Next, referring to FIG. 2B, a silicon nitride layer 203 as the inorganic insulating layer is formed on the bonding pad 202 and the substrate 201 by the plasma CVD method, as in the process shown in FIG. 1B. Subsequently, referring to FIG. 2C, a polyimide layer 204 is spin-coated on the silicon nitride layer 203 and then is pre-baked in a nitrogen atmosphere so that the polyimide layer 204 is hardened. Thereafter, referring to FIG. 2D, a negative-type photo-resist layer 205 is spin-coated on the polyimide layer 204.
Next, referring to FIG. 2E, exposure is performed of the photo-resist layer 205 using a positive-type photo-mask 206. Then, referring to FIG. 2F, development is performed of the photo-resist layer 205 using a dedicated developing solution. As a result, a part of the photo-resist layer 205 which has been exposed in FIG. 2E is developed and removed. In this manner, an opening 207 is formed through the photo-resist layer 205.
Next, referring to FIG. 2G, the polyimide layer 204 is selectively etched by organic solvent to form an opening 208, using the photo-resist layer 205 as an etching mask.
Next, referring to FIG. 2H, the silicon nitride layer 203 is dry-etched in a fluoric system atmosphere to form an opening 209 using the photoresist layer 205 and polyimide layer 204 as an etching mask.
Finally, referring to FIG. 2I, the photo-resist layer 205 is removed using a wet etching method. Subsequently, heat treatment is performed of the polyimide layer 204 in a nitrogen atmosphere. Thus, the opening 209 to the bonding pad 202 is formed in the passivation layer (203 and 204).
In this manner, in the second conventional method shown in FIGS. 2A to 2I, the opening 209 through the passivation layer (203 and 204) to the bonding pad 202 is also formed in a single photo-lithography process. Further, damage of the surface of the polyimide layer 204 due to the dry etching is restrained and a sticking error that trace of absorbed collets is left on the surface of the polyimide layer 204 is reduced in the mount.
However, in the second conventional method shown in FIGS. 2A to 2I, when the silicon nitride layer 203 is dry-etched, the surface of the photo-resist layer 205 is hardened. For this reason, there is a problem in that the photo-resist layer 205 cannot be removed by a wet etching method. Further, if an oxygen plasma ashing method is used to remove the hardened photo-resist layer 205, there is another problem in that the polyimide layer 204 is also removed. That is, this method is lacking in realizability.
A third conventional example of a manufacturing method of a semiconductor device in which a lamination structure composed of a polyimide layer and the inorganic insulating layer is used will be described with reference to FIGS. 3A to 3I. This conventional method is disclosed in Japanese Laid Open Patent Disclosure (JP-A-Heisei 5-190532: reference 2). The lamination structure is used as the interlayer insulating layer.
First, referring to FIG. 3A, an aluminum wiring layer 302 is formed on a semiconductor substrate 301. Subsequently, referring to FIG. 3B, a silicon nitride layer 303 as the inorganic insulating layer is formed by a plasma CVD method to cover the aluminium wiring layer 302 and the semiconductor substrate 301. Next, referring to FIG. 3C, a polyimide layer 304 is spin-coated, and then is pre-baked in a nitrogen atmosphere to be hardened in the film quality. Then, referring to FIG. 3D, a negative-type photo-resist layer 305 is spin-coated on the polyimide layer 304.
Next, referring to FIG. 3E, exposure is performed of the photo-resist layer 305 using a photo-mask 306. Then, referring to FIG. 3F, when development is performed using a dedicated developing solution, a part of the photo-resist layer 305 which has been exposed in the process shown in FIG. 3E is developed and removed. As a result, an opening 307 is formed by photo-resist layer 305.
Next, referring to FIG. 3G, the polyimide layer 304 is selectively etched in an oxygen system atmosphere such that an opening 308 is formed, using the photo-resist layer 305 as an etching mask. Subsequently, referring to FIG. 3H, dry etching is performed of the inorganic insulating layer 303 in a fluoric system atmosphere such that an opening 309 is formed, using the photo-resist layer 305 and the polyimide layer 304 as an etching mask.
Finally, referring to FIG. 3I, the photo-resist layer 305 is removed by a wet etching method. Subsequently, heat treatment is performed of the polyimide layer 304 in a nitrogen atmosphere. In this way, the through hole 309 is formed through the interlayer insulating layer (303 and 304) to the aluminum wiring layer 302.
In this manner, in the third conventional method shown in FIGS. 3A to 3I, the opening 309 through the interlayer insulating layer (303 and 304) to the aluminum wiring layer 302 is formed by the single photo-lithography process.
However, in the third conventional method shown in FIGS. 3A to 31, when the silicon nitride layer 303 is dry-etched, there is a problem in that it is impossible to remove the photo-resist layer 305 by a wet etching method, because the surface of the photo-resist layer 305 is hardened.
Also, if the hardened photo-resist layer 305 is removed by an oxygen plasma ashing method, the polyimide layer 304 would be removed together with the photo-resist layer 305. Therefore, this method is lacking in realizability.
Further, the polyimide layer 304 which is used as the interlayer insulating layer has the film thickness of a few of 1000 .ANG.. Thus, the polyimide layer 304 is very strong compared with the case where the polyimide layer 304 is used as the passivation layer. Accordingly, in order to form an opening in the polyimide layer 304 in an oxygen system atmosphere by an etching method with a small selection ratio, the thickness of photo-resist layer 305 must be made thicker. Thus, there is a problem in that the third conventional method is inferior in formation of a fine pattern.